200G PAM4 vs 200G NRZ

200G Ethernet can be built with different physical-layer signaling approaches. In common implementations, 200G PAM4 uses four 50G-class PAM4 lanes, while 200G NRZ can be implemented with eight 25G-class NRZ lanes. Both architectures deliver an aggregate 200Gb/s-class connection, but they reach that rate through very different lane structures.

The choice between PAM4 and NRZ affects more than the modulation format. Electrical bandwidth, SerDes requirements, optical lane count, signal margin, FEC, DSP, power consumption, transceiver packaging and network migration all change with the architecture. Understanding these differences is particularly important when designing 200G data center and AI networking links.

1. 200G PAM4 vs 200G NRZ at a Glance

2. What Is 200G NRZ?

In the context of 200G optical networking, 200G NRZ generally refers to an architecture that combines eight 25G-class NRZ channels to achieve an aggregate 200G connection.

NRZ uses two signal levels, with each symbol representing one binary bit. Because one symbol carries only one bit, reaching 200G with NRZ requires more physical lanes than a comparable PAM4 design.

QSFP-DD has been used for 200G 8 × 25G NRZ optical solutions, particularly in applications that emphasize low-complexity signaling and compatibility with mature 25G-class technology.

3. What Is 200G PAM4?

200G PAM4 uses four amplitude levels, allowing each symbol to represent two bits. A widely used architecture combines four 50G-class PAM4 lanes to form a 200G interface.

This approach increases the data carried by each lane without requiring the lane symbol rate to double compared with a 25G-class NRZ channel.

200G QSFP56 modules are commonly associated with this 4 × 50G PAM4 architecture.

4. Why 200G PAM4 Needs Fewer Lanes

The difference comes directly from the amount of information represented by each symbol:

NRZ: 1 symbol = 1 bit

PAM4: 1 symbol = 2 bits

A simplified lane calculation is:

200G NRZ ≈ 8 × 25G

200G PAM4 ≈ 4 × 50G

This lane reduction is one of the main reasons PAM4 became important as Ethernet speeds moved upward.

5. Symbol Rate and Bandwidth Efficiency

For the same data throughput, PAM4 requires fewer symbols than NRZ because each PAM4 symbol carries two bits.

A 50G-class PAM4 lane can therefore provide approximately twice the bit rate of a 25G-class NRZ lane while remaining within a similar signaling-rate range.

This improves the efficiency of electrical and optical components because simply doubling the NRZ symbol rate would create much higher bandwidth requirements for SerDes, PCB traces, connectors and optical devices.

6. Signal Levels and Eye Openings

NRZ has two amplitude levels and one eye opening. PAM4 uses four levels and creates three eye openings.

The additional PAM4 levels divide the available signal range into smaller amplitude intervals. This produces smaller individual eye openings and tighter vertical noise margins.

As a result, PAM4 requires more careful control of signal integrity and greater precision in both the transmitter and receiver.

7. Signal Integrity and Noise Sensitivity

NRZ has a relatively simple decision structure because the receiver distinguishes between two signal states. This makes it easier to tolerate certain forms of noise and distortion.

PAM4 receivers must distinguish four different amplitude levels. Noise, crosstalk, reflections, insertion loss and nonlinear distortion can therefore have a greater influence on the recovered signal.

This trade-off allows PAM4 to provide more information per symbol but increases the complexity of the physical layer.

8. Electrical SerDes Architecture

The electrical interface is an important part of the comparison. An 8 × 25G NRZ architecture can make use of mature 25G-class electrical technology and multiple conventional lanes.

A 4 × 50G PAM4 architecture reduces the number of lanes but requires 50G-class PAM4 SerDes technology. This becomes increasingly useful as switch ASICs and network interfaces evolve toward higher per-lane bandwidth.

The host port, transceiver electrical interface and internal module architecture must therefore be compatible with one another.

9. Optical Lane and Fiber Architecture

The signaling choice can affect the optical side of the transceiver as well. A 200G NRZ architecture based on eight 25G lanes can require a larger number of optical channels.

A 4 × 50G PAM4 design can achieve the same aggregate bandwidth with fewer higher-speed optical lanes, which can help reduce the number of fibers or optical channels in suitable module architectures.

However, the actual fiber count also depends on whether the module uses parallel optics, WDM, duplex fiber or another optical arrangement.

10. DSP and FEC Considerations

Higher-speed PAM4 interfaces generally place greater demands on signal processing. Equalization, clock recovery, signal conditioning and FEC can be important parts of the physical-layer design.

NRZ has simpler amplitude decisions and can use a less demanding signal path in some implementations. This does not mean every 200G NRZ module avoids DSP or FEC; the actual requirements depend on the module architecture and interface.

11. 200G NRZ Optical Module Examples

These examples illustrate how 25G NRZ technology can be aggregated to create a 200G connection without moving every physical lane to PAM4.

12. 200G PAM4 Optical Module Examples

These interfaces show how 50G-class PAM4 lanes can be combined into a 200G optical connection while supporting different fiber types and transmission distances.

13. Power Consumption

Power consumption depends on the optical engine, SerDes, DSP, laser technology, connector configuration and transceiver generation.

One potential advantage of an NRZ architecture is the use of mature 25G-class components and simpler signal processing. PAM4 can reduce the number of lanes required but introduces more demanding electrical and signal-processing requirements.

Actual module power should therefore be compared from the specific product datasheets rather than assuming that one modulation format always consumes less power.

14. Cost and Deployment Considerations

200G NRZ can benefit from an established 25G optical component ecosystem, which can simplify certain implementations. PAM4 can reduce lane count and fiber requirements while supporting a higher per-lane data rate.

The resulting system cost depends on more than the optical module. Switch ASICs, electrical interfaces, fiber count, breakout requirements, power consumption and existing network infrastructure can all affect the overall economics.

15. 200G PAM4 vs 200G NRZ Applications

16. Can 200G NRZ and 200G PAM4 Use the Same Form Factor?

They can appear in different implementations within related pluggable form factors, so the package alone does not identify the modulation format.

For example, 200G QSFP-DD products can be built around 8 × 25G NRZ architectures, while 200G QSFP56 products commonly use 4 × 50G PAM4. Some platforms can also support multiple signaling modes or use internal gearbox functions to convert between electrical and optical lane structures.

Host compatibility should therefore be verified from the exact transceiver specification rather than the physical size of the module.

17. How to Choose Between 200G PAM4 and 200G NRZ

18. 200G PAM4 vs 200G NRZ: Summary

200G PAM4 and 200G NRZ can both deliver an aggregate 200G-class connection, but they use different approaches. A common NRZ architecture combines eight 25G-class lanes, while a common PAM4 architecture combines four 50G-class lanes.

NRZ benefits from simpler two-level signaling and the maturity of 25G-class technology. PAM4 increases information density by carrying two bits per symbol, allowing fewer higher-speed lanes and supporting the SerDes evolution toward higher-bandwidth Ethernet interfaces.

The trade-off is greater physical-layer complexity for PAM4. Smaller eye openings, tighter signal margins and greater reliance on equalization and FEC make signal integrity an important part of the design.

For a real 200G deployment, the correct architecture depends on host SerDes, transceiver form factor, optical lane configuration, fiber infrastructure, FEC requirements, power budget and the intended migration path toward higher-speed networking.

19.200G PAM4 vs 200G NRZ Q&A